Maxim-Integrated /max78002 /SDHC /CFG_0

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Interpret as CFG_0

31282724232019161512118743000000000000000000000000000000000000000000TO_CLK_FREQ0 (TO_CLK_UNIT)TO_CLK_UNIT0CLK_FREQ0MAX_BLK_LEN0 (BIT_8)BIT_80 (ADMA2)ADMA20 (HS)HS0 (SDMA)SDMA0 (SUSPEND)SUSPEND0 (V3_3)V3_30 (V3_0)V3_00 (V1_8)V1_80 (BIT_64_SYS_BUS)BIT_64_SYS_BUS0 (ASYNC_INT)ASYNC_INT0SLOT_TYPE

Description

Capabilities 0-31.

Fields

TO_CLK_FREQ

Timeout Clock Frequency.

TO_CLK_UNIT

Timeout Clock Unit.

CLK_FREQ

Base Clock Frequency For SD Clock.

MAX_BLK_LEN

Max Block Length.

BIT_8

8-bit Support for Embedded Device.

ADMA2

ADMA2 Support.

HS

High Speed Support.

SDMA

SDMA Support.

SUSPEND

Suspend/Resume Support.

V3_3

Voltage Support 3.3V.

V3_0

Voltage Support 3.0V.

V1_8

Voltage Support 1.8V.

BIT_64_SYS_BUS

64-bit System Bus Support.

ASYNC_INT

Asynchronous Interrupt Support.

SLOT_TYPE

Slot Type.

Links

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