Regviz

Nuvoton /M05x_registers /ADC /ADDR7

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as ADDR7

Share

Cut and paste this URL to share the unmodified register and value:

https://regviz.com/r/Nuvoton/M05x_registers/ADC/ADDR7#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0RSLT0 (OVERRUN)OVERRUN 0 (VALID)VALID

Description

A/D Data Register 7

Fields

RSLT

A/D Conversion Result This field contains 12 bits conversion result.
OVERRUN

Over Run Flag 1 = Data in RSLT[11:0] is overwrite. 0 = Data in RSLT[11:0] is recent conversion result. If converted data in RSLT[11:0] has not been read before new conversion result is loaded to this register, OVERRUN is set to 1. It will be cleared by hardware after ADDR register is read.
VALID

Valid Flag 1 = Data in RSLT[11:0] bits is valid. 0 = Data in RSLT[11:0] bits is not valid. This bit is set to 1 when corresponding channel analog input conversion is completed and cleared by hardware after ADDR register is read.

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data