A/D Status Register
| ADF | A/D Conversion End Flag A status flag that indicates the end of A/D conversion. ADF is set to 1 at these two conditions: When A/D conversion ends in single mode When A/D conversion ends on all specified channels in scan mode. When more than 4 samples in FIFO in Burst mode. This bit can be cleared by writing 1 to itself. |
| CMPF0 | Compare Flag When the selected channel A/D conversion result meets the setting conditions of ADCMPR0 then this bit will be set to 1. And it can be cleared by writing 1 to itself. 1 = Conversion result in ADDR meets ADCMPR0 setting 0 = Conversion result in ADDR does not meet ADCMPR0 setting |
| CMPF1 | Compare Flag When the selected channel A/D conversion result meets the setting conditions of ADCMPR1 then this bit will be set to 1. And it can be cleared by writing 1 to itself. 1 = Conversion result in ADDR meets ADCMPR1 setting 0 = Conversion result in ADDR does not meet ADCMPR1 setting |
| BUSY | BUSY/IDLE 1 = A/D converter is busy at conversion. 0 = A/D converter is in idle state. This bit is mirror of as ADST bit in ADCR. It is read only. |
| CHANNEL | Current Conversion Channel This filed reflects current conversion channel when BUSY=1. When BUSY=0, it shows the next channel will be converted. It is read only. |
| VALID | Data Valid flag It is a mirror of VALID bit in ADDRx When ADC is in Burst Mode, and there is at least one valid conversion result in buffer, VALID[7:0] will all set to 1. |
| OVERRUN | Over Run flag It is a mirror to OVERRUN bit in ADDRx When ADC is in Burst Mode, and the buffer is overrun, OVERRUN[7:0] will all set to 1. |