Clock Source Select Control Register 0
| HCLK_S | HCLK clock source select. Note: Before clock switch the related clock sources (pre-select and new-select) must be turn on The 3-bit default value is reloaded with the value of Config0.CFOSC[26:24] in user configuration register in Flash controller by any reset. Therefore the default value is either 000b or 111b. These bits are protected bit, program this need an open lock sequence, write “59h”,“16h”,“88h” to address 0x5000_0100 to un-lock this bit. Reference the register REGWRPROT at address GCR_BA + 0x100 000 = clock source from external crystal clock (4 ~ 24MHz) 010 = clock source from PLL clock 011 = clock source from internal 10KHz oscillator clock 111 = clock source from internal 22.1184 MHz oscillator clock others = Reserved |
| STCLK_S | MCU Cortex_M0 SysTick clock source select. These bits are protected bit, program this need an open lock sequence, write “59h”,“16h”,“88h” to address 0x5000_0100 to un-lock this bit. Reference the register REGWRPROT at address GCR_BA + 0x100 000 = Clock source from external crystal clock (4 ~ 24MHz) 010 = Clock source from external crystal clock (4 ~ 24MHz)/2 011 = clock source from HCLK/2 1xx = clock source from internal 22.1184 MHz oscillator clock/2 |