Nuvoton /M05x_registers /CLK /CLKSEL2

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Interpret as CLKSEL2

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FRQDIV_S 0PWM45_S 0PWM67_S

Description

Clock Source Select Control Register 2

Fields

FRQDIV_S

Clock Divider Clock Source Select 00 = clock source from external crystal clock (4 ~ 24MHz) 10 = clock source from HCLK 11 = clock source from internal 22.1184 MHz oscillator clock

PWM45_S

PWM4 and PWM5 clock source select. - PWM4 and PWM5 used the same Engine clock source, both of them with the same pre-scalar 00 = clock source from external crystal clock (4 ~ 24MHz) 10 = clock source from HCLK 11 = clock source from internal 22.1184 MHz oscillator clock

PWM67_S

PWM6 and PWM7 clock source select. - PWM6 and PWM7 used the same Engine clock source, both of them with the same pre-scalar 00 = clock source from external crystal clock (4 ~ 24MHz) 10 = clock source from HCLK 11 = clock source from internal 22.1184 MHz oscillator clock

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