Nuvoton /M05x_registers /PWMA /PPR

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Interpret as PPR

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0CP010CP230DZI010DZI23

Description

PWM Pre-scalar Register

Fields

CP01

Clock pre-scalar 0(PWM counter 0 & 1 for group A and PWM counter 4 & 5 for group B) Clock input is divided by (CP01 + 1) before it is fed to the corresponding PWM counter If CP01=0, then the pre-scalar 0 output clock will be stopped. So corresponding PWM counter will be stopped also.

CP23

Clock pre-scalar 2(PWM counter 2 & 3 for group A and PWM counter 6 & 7 for group B) Clock input is divided by (CP23 + 1) before it is fed to the corresponding PWM counter If CP23=0, then the pre-scalar 2 output clock will be stopped. So corresponding PWM counter will be stopped also.

DZI01

Dead zone interval register for pair of channel 0 and channel 1(PWM0 and PWM1 pair for PWM group A, PWM4 and PWM5 pair for PWM group B) These 8 bits determine dead zone length. The unit time of dead zone length is received from corresponding CSR bits.

DZI23

Dead zone interval register for pair of channel 2 and channel 3(PWM2 and PWM3 pair for PWM group A, PWM6 and PWM7 pair for PWM group B) These 8 bits determine dead zone length. The unit time of dead zone length is received from corresponding CSR bits.

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