Nuvoton /NUC1xx_registers /CLK /CLKSEL0

HCLK clock source select (write-protection bits) Note:

1. Before clock switching, the related clock sources (both pre-select and new-select) must be turn on
2. The 3-bit default value is reloaded from the value of CFOSC (Config0[26:24]) in user configuration register of Flash controller by any reset. Therefore the default value is either 000b or 111b.
3. These bits are protected bit, It means programming this bit needs to write “59h”, “16h”, “88h” to address 0x5000_0100 to disable register protection. Reference the register REGWRPROT at address GCR_BA+0x100. 000 = Clock source from external 4~24 MHz crystal clock 001 = Clock source from external 32.768 kHz crystal clock 010 = Clock source from PLL clock 011 = Clock source from internal 10 kHz oscillator clock 111 = Clock source from internal 22.1184 MHz oscillator clock Others = reserved

Cortex_M0 SysTick clock source select (write-protection bits) If SYST_CSR[2]=0, SysTick uses listed clock source below These bits are protected bit. It means programming this bit needs to write “59h”, “16h”, “88h” to address 0x5000_0100 to disable register protection. Reference the register REGWRPROT at address GCR_BA+0x100. 000 = clock source from 4~24 MHz crystal clock 001 = Clock source from external 32.768 kHz crystal clock 010 = clock source from 12MHz crystal clock / 2 011 = clock source from HCLK / 2 1xx = Clock source from internal 22.1184 MHz oscillator clock / 2