Nuvoton /NUC1xx_registers /CLK /CLKSEL2

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Interpret as CLKSEL2

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0I2S_S 0FRQDIV_S 0PWM45_S 0PWM67_S

Description

Clock Source Select Control Register 2

Fields

I2S_S

I2S clock source select. 00 = Clock source from external 4~24 MHz crystal clock. 01 = Clock source from PLL clock. 10 = Clock source from HCLK. 11 = Clock source from internal 22.1184 MHz oscillator clock.

FRQDIV_S

Clock Divider Clock Source Select. 00 = Clock source from external 4~24 MHz crystal clock. 01 = Clock source from external 32.768 kHz crystal clock. 10 = Clock source from HCLK. 11 = Clock source from internal 22.1184 MHz oscillator clock.

PWM45_S

PWM4 and PWM5 Clock Source Select.(Medium Density Only) PWM4 and PWM5 used the same Engine clock source, both of them use the same prescaler. 00 = Clock source from external 4~24 MHz crystal clock. 01 = Clock source from external 32.768 kHz crystal clock. 10 = Clock source from HCLK. 11 = Clock source from internal 22.1184 MHz oscillator clock.

PWM67_S

PWM6 and PWM7 Clock Source Select.(Medium Density Only) PWM6 and PWM7 used the same Engine clock source, both of them use the same prescaler. 00 = Clock source from external 4~24 MHz crystal clock. 01 = Clock source from external 32.768 kHz crystal clock. 10 = Clock source from HCLK. 11 = Clock source from internal 22.1184 MHz oscillator clock.

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