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Nuvoton /NUC1xx_registers /FMC /DFBADR

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Interpret as DFBADR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0DFBADR

Description

Data Flash Base Address Register

Fields

DFBADR

Data Flash Base Address This register indicates data flash start address. It is a read only register. For 128kB flash memory device, the data flash size is defined by user configuration, register content is loaded from Config1 when chip power on but for 64/32kB device, it is fixed at 0x01_f000

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data