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Nuvoton /NUC1xx_registers /INT /MCU_IRQ

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Interpret as MCU_IRQ

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0MCU_IRQ

Description

MCU IRQ Number identify register

Fields

MCU_IRQ

MCU IRQ Source Register The MCU_IRQ collect all the interrupts from the peripherals and generate the synchronous interrupt to MCU Cortex-M0. There are two modes to generate interrupt to MCU Cortex-M0, the normal mode and test mode. The MCU_IRQ collect all interrupt from each peripheral and synchronize them then interrupt the Cortex-M0. When the MCU_IRQ[n] is “0”: Set MCU_IRQ[n] “1” will generate a interrupt to Cortex_M0 NVIC[n]. When the MCU_IRQ[n] is “1” (mean a interrupt is assert) set “1” to the MCU_bit[n] will clear the interrupt. Set MCU_IRQ[n] “0”: no any effect

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data