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Nuvoton /NUC1xx_registers /INT /NMI_SEL

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Interpret as NMI_SEL

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0NMI_SEL

Description

NMI source interrupt select control register

Fields

NMI_SEL

The NMI interrupt to Cortex-M0 can be selected from one of the peripheral interrupt by setting NMI_SEL.

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data