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Nuvoton /NUC1xx_registers /PDMA_GCR /PDMA_GCRCSR

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Interpret as PDMA_GCRCSR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (CLK0_EN)CLK0_EN 0 (CLK1_EN)CLK1_EN 0 (CLK2_EN)CLK2_EN 0 (CLK3_EN)CLK3_EN 0 (CLK4_EN)CLK4_EN 0 (CLK5_EN)CLK5_EN 0 (CLK6_EN)CLK6_EN 0 (CLK7_EN)CLK7_EN 0 (CLK8_EN)CLK8_EN

Description

PDMA Global Control Register

Fields

CLK0_EN

PDMA Controller Channel 0 Clock Enable Control 0 = Disable 1 = Enable
CLK1_EN

PDMA Controller Channel 1 Clock Enable Control(Medium Density Only) 0 = Disable 1 = Enable
CLK2_EN

PDMA Controller Channel 2 Clock Enable Control(Medium Density Only) 0 = Disable 1 = Enable
CLK3_EN

PDMA Controller Channel 3 Clock Enable Control(Medium Density Only) 0 = Disable 1 = Enable
CLK4_EN

PDMA Controller Channel 4 Clock Enable Control(Medium Density Only) 0 = Disable 1 = Enable
CLK5_EN

PDMA Controller Channel 5 Clock Enable Control(Medium Density Only) 0 = Disable 1 = Enable
CLK6_EN

PDMA Controller Channel 6 Clock Enable Control(Medium Density Only) 0 = Disable 1 = Enable
CLK7_EN

PDMA Controller Channel 7 Clock Enable Control(Medium Density Only) 0 = Disable 1 = Enable
CLK8_EN

PDMA Controller Channel 8 Clock Enable Control(Medium Density Only) 0 = Disable 1 = Enable

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data