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Nuvoton /NUC1xx_registers /PWMA /CAPENR

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Interpret as CAPENR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0CAPENR

Description

Capture Input Enable Register

Fields

CAPENR

Capture Input Enable Register There are four capture inputs from pad. Bit0~Bit3 are used to control each inputs enable or disable. 0 = Disable (PWMx multi-function pin input does not affect input capture function) 1 = Enable (PWMx multi-function pin input will affect its input capture function.)

CAPENR Bit 3210 for PWM group A Bit xxx1 Capture channel 0 is from pin PA.12 Bit xx1x Capture channel 1 is from pin PA.13 Bit x1xx Capture channel 2 is from pin PA.14 Bit 1xxx Capture channel 3 is from pin PA.15 Bit 3210 for PWM group B Bit xxx1 Capture channel 0 is from pin PE.11 Bit xx1x Capture channel 1 is from pin PE.5 Bit x1xx Capture channel 2 is from pin PE.0 Bit 1xxx Capture channel 3 is from pin PE.1

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data