Regviz

Nuvoton /NUC1xx_registers /PWMA /CNR3

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as CNR3

Share

Cut and paste this URL to share the unmodified register and value:

https://regviz.com/r/Nuvoton/NUC1xx_registers/PWMA/CNR3#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0CNR

Description

PWM Counter Register 3

Fields

CNR

PWM Counter/Timer Loaded Value CNR determines the PWM period. PWM frequency = PWM23_CLK/(prescale+1)*(clock divider)/(CNR+1). Duty ratio = (CMR+1)/(CNR+1). CMR >= CNR: PWM output is always high. CMR < CNR: PWM low width = (CNR-CMR) unit; PWM high width = (CMR+1) unit. CMR = 0: PWM low width = (CNR) unit; PWM high width = 1 unit (Unit : 1 PWM clock cycle) Note: Any write to CNR will take effect in next PWM cycle.

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data