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Nuvoton /NUC1xx_registers /PWMA /PBCR

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Interpret as PBCR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (BCn)BCn

Description

New description for register

Fields

BCn

PWM Backward Compatible Register 0 = PWM register action is compatible with Medium Density 1 = PWM register action is not compatible with Medium Density Please reference CCR0/CCR2 register bit 6, 7, 22, 23 description

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data