Regviz

Nuvoton /NUC1xx_registers /PWMA /POE

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as POE

Share

Cut and paste this URL to share the unmodified register and value:

https://regviz.com/r/Nuvoton/NUC1xx_registers/PWMA/POE#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (PWM0)PWM0 0 (PWM1)PWM1 0 (PWM2)PWM2 0 (PWM3)PWM3

Description

PWM Output Enable Register

Fields

PWM0

PWM Channel 0 Output Enable Register 1 = Enable PWM channel 0 output to pin 0 = Disable PWM channel 0 output to pin Note: The corresponding GPIO pin also must be switched to PWM function.
PWM1

PWM Channel 1 Output Enable Register 1 = Enable PWM channel 1 output to pin 0 = Disable PWM channel 1 output to pin Note: The corresponding GPIO pin also must be switched to PWM function.
PWM2

PWM Channel 2 Output Enable Register 1 = Enable PWM channel 2 output to pin 0 = Disable PWM channel 2 output to pin Note: The corresponding GPIO pin also must be switched to PWM function.
PWM3

PWM Channel 3 Output Enable Register 1 = Enable PWM channel 3 output to pin 0 = Disable PWM channel 3 output to pin Note: The corresponding GPIO pin also must be switched to PWM function.

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data