PWM Prescaler Register
| CP01 | Clock prescaler 0 (PWM-timer 0 & 1 for group A and PWM-timer 4 & 5 for group B) Clock input is divided by (CP01 + 1) before it is fed to the corresponding PWM-timer If CP01=0, then the clock prescaler 0 output clock will be stopped. So corresponding PWM-timer will be stopped also. |
| CP23 | Clock prescaler 2 (PWM-timer2 & 3 for group A and PWM-timer 6 & 7 for group B) Clock input is divided by (CP23 + 1) before it is fed to the corresponding PWM-timer. If CP23=0, then the clock prescaler 2 output clock will be stopped. So corresponding PWM-timer will be stopped also. |
| DZI01 | Dead Zone Interval for Pair of Channel 0 and Channel 1 (PWM0 and PWM1 pair for PWM group A, PWM4 and PWM5 pair for PWM group B) These 8 bits determine dead zone length. The unit time of dead zone length is received from corresponding CSR bits. |
| DZI23 | Dead Zone Interval for Pair of Channel2 and Channel3 (PWM2 and PWM3 pair for PWM group A, PWM6 and PWM7 pair for PWM group B) These 8 bits determine dead zone length. The unit time of dead zone length is received from corresponding CSR bits. |