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STMicroelectronics /STM32F042x /RCC /APB1RSTR

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Interpret as APB1RSTR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (TIM2RST)TIM2RST 0 (TIM3RST)TIM3RST 0 (TIM14RST)TIM14RST 0 (WWDGRST)WWDGRST 0 (SPI2RST)SPI2RST 0 (USART2RST)USART2RST 0 (I2C1RST)I2C1RST 0 (USBRST)USBRST 0 (CANRST)CANRST 0 (CRSRST)CRSRST 0 (PWRRST)PWRRST 0 (CECRST)CECRST

Description

APB1 peripheral reset register (RCC_APB1RSTR)

Fields

TIM2RST

Timer 2 reset
TIM3RST

Timer 3 reset
TIM14RST

Timer 14 reset
WWDGRST

Window watchdog reset
SPI2RST

SPI2 reset
USART2RST

USART 2 reset
I2C1RST

I2C1 reset
USBRST

USB interface reset
CANRST

CAN interface reset
CRSRST

Clock Recovery System interface reset
PWRRST

Power interface reset
CECRST

HDMI CEC reset

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data