Cut and paste this URL to share the unmodified register and value:
https://regviz.com/r/STMicroelectronics/STM32F042x/SYSCFG/CFGR2#0x0
configuration register 2
Cortex-M0 LOCKUP bit enable bit
SRAM parity lock bit
PVD lock enable bit
SRAM parity flag
https://github.com/cmsis-svd/cmsis-svd-data