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STMicroelectronics /STM32F0xx /RCC /CR2

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Interpret as CR2

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (HSI14ON)HSI14ON 0 (HSI14RDY)HSI14RDY 0 (HSI14DIS)HSI14DIS 0HSI14TRIM0HSI14CAL

Description

Clock control register 2

Fields

HSI14ON

HSI14 clock enable
HSI14RDY

HR14 clock ready flag
HSI14DIS

HSI14 clock request from ADC disable
HSI14TRIM

HSI14 clock trimming
HSI14CAL

HSI14 clock calibration

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data