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STMicroelectronics /STM32F0xx /SYSCFG /CFGR1

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Interpret as CFGR1

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0MEM_MODE 0 (ADC_DMA_RMP)ADC_DMA_RMP 0 (USART1_TX_DMA_RMP)USART1_TX_DMA_RMP 0 (USART1_RX_DMA_RMP)USART1_RX_DMA_RMP 0 (TIM16_DMA_RMP)TIM16_DMA_RMP 0 (TIM17_DMA_RMP)TIM17_DMA_RMP 0 (I2C_PB6_FM)I2C_PB6_FM 0 (I2C_PB7_FM)I2C_PB7_FM 0 (I2C_PB8_FM)I2C_PB8_FM 0 (I2C_PB9_FM)I2C_PB9_FM

Description

configuration register 1

Fields

MEM_MODE

Memory mapping selection bits
ADC_DMA_RMP

ADC DMA remapping bit
USART1_TX_DMA_RMP

USART1_TX DMA remapping bit
USART1_RX_DMA_RMP

USART1_RX DMA request remapping bit
TIM16_DMA_RMP

TIM16 DMA request remapping bit
TIM17_DMA_RMP

TIM17 DMA request remapping bit
I2C_PB6_FM

Fast Mode Plus (FM+) driving capability activation bits.
I2C_PB7_FM

Fast Mode Plus (FM+) driving capability activation bits.
I2C_PB8_FM

Fast Mode Plus (FM+) driving capability activation bits.
I2C_PB9_FM

Fast Mode Plus (FM+) driving capability activation bits.

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data