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STMicroelectronics /STM32F100xx /RCC /APB2RSTR

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Interpret as APB2RSTR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (AFIORST)AFIORST 0 (IOPARST)IOPARST 0 (IOPBRST)IOPBRST 0 (IOPCRST)IOPCRST 0 (IOPDRST)IOPDRST 0 (IOPERST)IOPERST 0 (IOPFRST)IOPFRST 0 (IOPGRST)IOPGRST 0 (ADC1RST)ADC1RST 0 (TIM1RST)TIM1RST 0 (SPI1RST)SPI1RST 0 (USART1RST)USART1RST 0 (TIM15RST)TIM15RST 0 (TIM16RST)TIM16RST 0 (TIM17RST)TIM17RST

Description

APB2 peripheral reset register (RCC_APB2RSTR)

Fields

AFIORST

Alternate function I/O reset
IOPARST

IO port A reset
IOPBRST

IO port B reset
IOPCRST

IO port C reset
IOPDRST

IO port D reset
IOPERST

IO port E reset
IOPFRST

IO port F reset
IOPGRST

IO port G reset
ADC1RST

ADC 1 interface reset
TIM1RST

TIM1 timer reset
SPI1RST

SPI 1 reset
USART1RST

USART1 reset
TIM15RST

TIM15 timer reset
TIM16RST

TIM16 timer reset
TIM17RST

TIM17 timer reset

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data