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STMicroelectronics /STM32F102xx /RCC /AHBENR

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Interpret as AHBENR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (DMA1EN)DMA1EN 0 (DMA2EN)DMA2EN 0 (SRAMEN)SRAMEN 0 (FLITFEN)FLITFEN 0 (CRCEN)CRCEN

Description

AHB Peripheral Clock enable register (RCC_AHBENR)

Fields

DMA1EN

DMA1 clock enable
DMA2EN

DMA2 clock enable
SRAMEN

SRAM interface clock enable
FLITFEN

FLITF clock enable
CRCEN

CRC clock enable

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data