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STMicroelectronics /STM32F102xx /RCC /APB1RSTR

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Interpret as APB1RSTR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (TIM2RST)TIM2RST 0 (TIM3RST)TIM3RST 0 (WWDGRST)WWDGRST 0 (USART2RST)USART2RST 0 (I2C1RST)I2C1RST 0 (BKPRST)BKPRST 0 (PWRRST)PWRRST

Description

APB1 peripheral reset register (RCC_APB1RSTR)

Fields

TIM2RST

Timer 2 reset
TIM3RST

Timer 3 reset
WWDGRST

Window watchdog reset
USART2RST

USART 2 reset
I2C1RST

I2C1 reset
BKPRST

Backup interface reset
PWRRST

Power interface reset

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data