STMicroelectronics /STM32F301 /ADC /CFGR

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Interpret as CFGR

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (DMAEN)DMAEN 0 (DMACFG)DMACFG 0RES0 (ALIGN)ALIGN 0EXTSEL0EXTEN 0 (OVRMOD)OVRMOD 0 (CONT)CONT 0 (AUTDLY)AUTDLY 0 (DISCEN)DISCEN 0DISCNUM 0 (JDISCEN)JDISCEN 0 (JQM)JQM 0 (AWD1SGL)AWD1SGL 0 (AWD1EN)AWD1EN 0 (JAWD1EN)JAWD1EN 0 (JAUTO)JAUTO 0AWD1CH

Description

ADC configuration register

Fields

DMAEN

Direct memory access enable

DMACFG

Direct memory access configuration

RES

Data resolution

ALIGN

Data alignment

EXTSEL

External trigger selection for regular group

EXTEN

External trigger enable and polarity selection for regular channels

OVRMOD

Overrun Mode

CONT

Single / continuous conversion mode for regular conversions

AUTDLY

Delayed conversion mode

DISCEN

Discontinuous mode for regular channels

DISCNUM

Discontinuous mode channel count

JDISCEN

Discontinuous mode on injected channels

JQM

JSQR queue mode

AWD1SGL

Enable the watchdog 1 on a single channel or on all channels

AWD1EN

Analog watchdog 1 enable on regular channels

JAWD1EN

Analog watchdog 1 enable on injected channels

JAUTO

Automatic injected group conversion

AWD1CH

Analog watchdog 1 channel selection

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