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STMicroelectronics /STM32F301 /ADC /SQR1

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Interpret as SQR1

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0L0SQ10SQ20SQ30SQ4

Description

ADC regular sequence register 1

Fields

L

Regular channel sequence length
SQ1

1st conversion in regular sequence
SQ2

2nd conversion in regular sequence
SQ3

3rd conversion in regular sequence
SQ4

4th conversion in regular sequence

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data