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STMicroelectronics /STM32F3x8 /SYSCFG_COMP_OPAMP /SYSCFG_CFGR3

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Interpret as SYSCFG_CFGR3

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0SPI1_RX_DMA_RMP 0SPI1_TX_DMA_RMP 0I2C1_RX_DMA_RMP 0ADC2_DMA_RMP_0 0 (ADC2_DMA_RMP_1)ADC2_DMA_RMP_1 0 (DAC1_TRIG3_RMP)DAC1_TRIG3_RMP 0 (DAC1_TRIG5_RMP)DAC1_TRIG5_RMP

Description

configuration register 3

Fields

SPI1_RX_DMA_RMP

SPI1_RX DMA remapping bit
SPI1_TX_DMA_RMP

SPI1_TX DMA remapping bit
I2C1_RX_DMA_RMP

I2C1_RX DMA remapping bit
ADC2_DMA_RMP_0

ADC2 DMA channel remapping bit
ADC2_DMA_RMP_1

ADC2 DMA controller remapping bit
DAC1_TRIG3_RMP

DAC1_CH1 / DAC1_CH2 Trigger remap
DAC1_TRIG5_RMP

DAC1_CH1 / DAC1_CH2 Trigger remap

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data