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STMicroelectronics /STM32F401 /RCC /AHB2LPENR

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Interpret as AHB2LPENR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (OTGFSLPEN)OTGFSLPEN

Description

AHB2 peripheral clock enable in low power mode register

Fields

OTGFSLPEN

USB OTG FS clock enable during Sleep mode

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data