PLL configuration register
| PLLM0 | Division factor for the main PLL (PLL) and audio PLL (PLLI2S) input clock |
| PLLM1 | Division factor for the main PLL (PLL) and audio PLL (PLLI2S) input clock |
| PLLM2 | Division factor for the main PLL (PLL) and audio PLL (PLLI2S) input clock |
| PLLM3 | Division factor for the main PLL (PLL) and audio PLL (PLLI2S) input clock |
| PLLM4 | Division factor for the main PLL (PLL) and audio PLL (PLLI2S) input clock |
| PLLM5 | Division factor for the main PLL (PLL) and audio PLL (PLLI2S) input clock |
| PLLN0 | Main PLL (PLL) multiplication factor for VCO |
| PLLN1 | Main PLL (PLL) multiplication factor for VCO |
| PLLN2 | Main PLL (PLL) multiplication factor for VCO |
| PLLN3 | Main PLL (PLL) multiplication factor for VCO |
| PLLN4 | Main PLL (PLL) multiplication factor for VCO |
| PLLN5 | Main PLL (PLL) multiplication factor for VCO |
| PLLN6 | Main PLL (PLL) multiplication factor for VCO |
| PLLN7 | Main PLL (PLL) multiplication factor for VCO |
| PLLN8 | Main PLL (PLL) multiplication factor for VCO |
| PLLP0 | Main PLL (PLL) division factor for main system clock |
| PLLP1 | Main PLL (PLL) division factor for main system clock |
| PLLSRC | Main PLL(PLL) and audio PLL (PLLI2S) entry clock source |
| PLLQ0 | Main PLL (PLL) division factor for USB OTG FS, SDIO and random number generator clocks |
| PLLQ1 | Main PLL (PLL) division factor for USB OTG FS, SDIO and random number generator clocks |
| PLLQ2 | Main PLL (PLL) division factor for USB OTG FS, SDIO and random number generator clocks |
| PLLQ3 | Main PLL (PLL) division factor for USB OTG FS, SDIO and random number generator clocks |
| PLLR1 | PLLR1 |
| PLLR2 | PLLR2 |
| PLLR3 | PLLR3 |