Regviz

STMicroelectronics /STM32F412 /RCC /AHB2LPENR

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as AHB2LPENR

Share

Cut and paste this URL to share the unmodified register and value:

https://regviz.com/r/STMicroelectronics/STM32F412/RCC/AHB2LPENR#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (RNGLPEN)RNGLPEN 0 (OTGFSLPEN)OTGFSLPEN

Description

AHB2 peripheral clock enable in low power mode register

Fields

RNGLPEN

RNGLPEN
OTGFSLPEN

USB OTG FS clock enable during Sleep mode

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data