APB2LPENR

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Interpret as APB2LPENR

APB2 peripheral clock enabled in low power mode register

TIM1LPEN	TIM1 clock enable during Sleep mode
TIM8LPEN	TIM8LPEN
USART1LPEN	USART1 clock enable during Sleep mode
USART6LPEN	USART6 clock enable during Sleep mode
ADC1LPEN	ADC1 clock enable during Sleep mode
SDIOLPEN	SDIO clock enable during Sleep mode
SPI1LPEN	SPI 1 clock enable during Sleep mode
SPI4LPEN	SPI4 clock enable during Sleep mode
SYSCFGLPEN	System configuration controller clock enable during Sleep mode
TIM9LPEN	TIM9 clock enable during sleep mode
TIM10LPEN	TIM10 clock enable during Sleep mode
TIM11LPEN	TIM11 clock enable during Sleep mode
DFSDMLPEN	DFSDMLPEN

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