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STMicroelectronics /STM32F412 /RCC /APB2RSTR

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Interpret as APB2RSTR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (TIM1RST)TIM1RST 0 (TIM8RST)TIM8RST 0 (USART1RST)USART1RST 0 (USART6RST)USART6RST 0 (ADCRST)ADCRST 0 (SDIORST)SDIORST 0 (SPI1RST)SPI1RST 0 (SYSCFGRST)SYSCFGRST 0 (TIM9RST)TIM9RST 0 (TIM10RST)TIM10RST 0 (TIM11RST)TIM11RST 0 (DFSDMRST)DFSDMRST

Description

APB2 peripheral reset register

Fields

TIM1RST

TIM1 reset
TIM8RST

TIM8RST
USART1RST

USART1 reset
USART6RST

USART6 reset
ADCRST

ADC interface reset (common to all ADCs)
SDIORST

SDIO reset
SPI1RST

SPI 1 reset
SYSCFGRST

System configuration controller reset
TIM9RST

TIM9 reset
TIM10RST

TIM10 reset
TIM11RST

TIM11 reset
DFSDMRST

DFSDMRST

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data