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STMicroelectronics /STM32F446 /RCC /DCKCFGR2

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Interpret as DCKCFGR2

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FMPI2C1SEL 0 (CECSEL)CECSEL 0 (CK48MSEL)CK48MSEL 0 (SDIOSEL)SDIOSEL 0 (SPDIFSEL)SPDIFSEL

Description

dedicated clocks configuration register 2

Fields

FMPI2C1SEL

I2C4 kernel clock source selection
CECSEL

HDMI CEC clock source selection
CK48MSEL

SDIO/USBFS/HS clock selection
SDIOSEL

SDIO clock selection
SPDIFSEL

SPDIF clock selection

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data