STMicroelectronics /STM32F7x3 /RCC /DCKCFGR2

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Interpret as DCKCFGR2

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0UART1SEL 0UART2SEL 0UART3SEL 0UART4SEL 0UART5SEL 0UART6SEL 0UART7SEL 0UART8SEL 0I2C1SEL 0I2C2SEL 0I2C3SEL 0LPTIM1SEL 0 (CK48MSEL)CK48MSEL 0 (SDMMC1SEL)SDMMC1SEL 0 (SDMMC2SEL)SDMMC2SEL

Description

dedicated clocks configuration register

Fields

UART1SEL

USART 1 clock source selection

UART2SEL

USART 2 clock source selection

UART3SEL

USART 3 clock source selection

UART4SEL

UART 4 clock source selection

UART5SEL

UART 5 clock source selection

UART6SEL

USART 6 clock source selection

UART7SEL

UART 7 clock source selection

UART8SEL

UART 8 clock source selection

I2C1SEL

I2C1 clock source selection

I2C2SEL

I2C2 clock source selection

I2C3SEL

I2C3 clock source selection

LPTIM1SEL

Low power timer 1 clock source selection

CK48MSEL

48MHz clock source selection

SDMMC1SEL

SDMMC1 clock source selection

SDMMC2SEL

SDMMC2 clock source selection

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