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STMicroelectronics /STM32G031 /RCC /AHBSMENR

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Interpret as AHBSMENR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (DMASMEN)DMASMEN 0 (FLASHSMEN)FLASHSMEN 0 (SRAMSMEN)SRAMSMEN 0 (CRCSMEN)CRCSMEN

Description

AHB peripheral clock enable in Sleep mode register

Fields

DMASMEN

DMA clock enable during Sleep mode
FLASHSMEN

Flash memory interface clock enable during Sleep mode
SRAMSMEN

SRAM clock enable during Sleep mode
CRCSMEN

CRC clock enable during Sleep mode

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data