STMicroelectronics /STM32G050 /DMAMUX /DMAMUX_RGCFR

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Interpret as DMAMUX_RGCFR

31282724232019161512118743000000000000000000000000000000000000000000 (COF0)COF00 (COF1)COF10 (COF2)COF20 (COF3)COF3

Description

DMAMUX request generator interrupt clear flag register

Fields

COF0

Clear trigger overrun event flag Writing 1 in each bit clears the corresponding overrun flag OFx in the DMAMUX_RGSR register.

COF1

Clear trigger overrun event flag Writing 1 in each bit clears the corresponding overrun flag OFx in the DMAMUX_RGSR register.

COF2

Clear trigger overrun event flag Writing 1 in each bit clears the corresponding overrun flag OFx in the DMAMUX_RGSR register.

COF3

Clear trigger overrun event flag Writing 1 in each bit clears the corresponding overrun flag OFx in the DMAMUX_RGSR register.

Links

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