STMicroelectronics /STM32G050 /TIM1 /TIM1_AF1

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as TIM1_AF1

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (B_0x0)BKINE 0 (B_0x0)BKINP 0 (B_0x0)ETRSEL

BKINE=B_0x0, BKINP=B_0x0, ETRSEL=B_0x0

Description

TIM1 alternate function option register 1

Fields

BKINE

BRK BKIN input enable This bit enables the BKIN alternate function input for the timer’s BRK input. BKIN input is 'ORed’ with the other BRK sources. Note: This bit can not be modified as long as LOCK level 1 has been programmed (LOCK bits in TIMx_BDTR register).

0 (B_0x0): BKIN input disabled

1 (B_0x1): BKIN input enabled

BKINP

BRK BKIN input polarity This bit selects the BKIN alternate function input sensitivity. It must be programmed together with the BKP polarity bit. Note: This bit can not be modified as long as LOCK level 1 has been programmed (LOCK bits in TIMx_BDTR register).

0 (B_0x0): BKIN input polarity is not inverted (active low if BKP=0, active high if BKP=1)

1 (B_0x1): BKIN input polarity is inverted (active high if BKP=0, active low if BKP=1)

ETRSEL

ETR source selection These bits select the ETR input source. Others: Reserved Note: These bits can not be modified as long as LOCK level 1 has been programmed (LOCK bits in TIMx_BDTR register).

0 (B_0x0): ETR legacy mode

1 (B_0x1): COMP1 output

2 (B_0x2): COMP2 output

3 (B_0x3): ADC1 AWD1

4 (B_0x4): ADC1 AWD2

5 (B_0x5): ADC1 AWD3

Links

()