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STMicroelectronics /STM32G050 /TIM1 /TIM1_AF2

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Interpret as TIM1_AF2

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (B_0x0)BK2INE 0 (B_0x0)BK2INP

BK2INP=B_0x0, BK2INE=B_0x0

Description

TIM1 alternate function option register 2

Fields

BK2INE

BRK2 BKIN input enable This bit enables the BKIN2 alternate function input for the timer’s BRK2 input. BKIN2 input is 'ORed’ with the other BRK2 sources. Note: This bit can not be modified as long as LOCK level 1 has been programmed (LOCK bits in TIMx_BDTR register).

0 (B_0x0): BKIN2 input disabled

1 (B_0x1): BKIN2 input enabled
BK2INP

BRK2 BKIN2 input polarity This bit selects the BKIN2 alternate function input sensitivity. It must be programmed together with the BK2P polarity bit. Note: This bit can not be modified as long as LOCK level 1 has been programmed (LOCK bits in TIMx_BDTR register).

0 (B_0x0): BKIN2 input polarity is not inverted (active low if BK2P=0, active high if BK2P=1)

1 (B_0x1): BKIN2 input polarity is inverted (active high if BK2P=0, active low if BK2P=1)

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data