TIM1_TISEL

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Interpret as TIM1_TISEL

TI2SEL=B_0x0, TI4SEL=B_0x0, TI3SEL=B_0x0, TI1SEL=B_0x0

TIM1 timer input selection register

TI1SEL	selects TI1[0] to TI1[15] input Others: Reserved 0 (B_0x0): TIM1_CH1 input 1 (B_0x1): COMP1 output
TI2SEL	selects TI2[0] to TI2[15] input Others: Reserved 0 (B_0x0): TIM1_CH2 input 1 (B_0x1): COMP2 output
TI3SEL	selects TI3[0] to TI3[15] input Others: Reserved 0 (B_0x0): TIM1_CH3 input
TI4SEL	selects TI4[0] to TI4[15] input Others: Reserved 0 (B_0x0): TIM1_CH4 input

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