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STMicroelectronics /STM32G07x /RCC /AHBENR

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Interpret as AHBENR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (DMAEN)DMAEN 0 (FLASHEN)FLASHEN 0 (CRCEN)CRCEN 0 (AESEN)AESEN 0 (RNGEN)RNGEN

Description

AHB peripheral clock enable register

Fields

DMAEN

DMA clock enable
FLASHEN

Flash memory interface clock enable
CRCEN

CRC clock enable
AESEN

AES hardware accelerator
RNGEN

Random number generator clock enable

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data