CFGR2

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Interpret as CFGR2

SYSCFG configuration register 1

LOCKUP_LOCK	Cortex-M0+ LOCKUP bit enable bit
SRAM_PARITY_LOCK	SRAM parity lock bit
PVD_LOCK	PVD lock enable bit
ECC_LOCK	ECC error lock bit
SRAM_PEF	SRAM parity error flag

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