STMicroelectronics /STM32G0B1 /DAC /DAC_MCR

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Interpret as DAC_MCR

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (B_0x0)MODE10 (B_0x0)MODE2

MODE1=B_0x0, MODE2=B_0x0

Description

DAC mode control register

Fields

MODE1

DAC channel1 mode These bits can be written only when the DAC is disabled and not in the calibration mode (when bit EN1=0 and bit CEN1 =0 in the DAC_CR register). If EN1=1 or CEN1 =1 the write operation is ignored. They can be set and cleared by software to select the DAC channel1 mode: DAC channel1 in Normal mode DAC channel1 in sample & hold mode Note: This register can be modified only when EN1=0.

0 (B_0x0): DAC channel1 is connected to external pin with Buffer enabled

1 (B_0x1): DAC channel1 is connected to external pin and to on chip peripherals with Buffer enabled

2 (B_0x2): DAC channel1 is connected to external pin with Buffer disabled

3 (B_0x3): DAC channel1 is connected to on chip peripherals with Buffer disabled

4 (B_0x4): DAC channel1 is connected to external pin with Buffer enabled

5 (B_0x5): DAC channel1 is connected to external pin and to on chip peripherals with Buffer enabled

6 (B_0x6): DAC channel1 is connected to external pin and to on chip peripherals with Buffer disabled

7 (B_0x7): DAC channel1 is connected to on chip peripherals with Buffer disabled

MODE2

DAC channel2 mode These bits can be written only when the DAC is disabled and not in the calibration mode (when bit EN2=0 and bit CEN2 =0 in the DAC_CR register). If EN2=1 or CEN2 =1 the write operation is ignored. They can be set and cleared by software to select the DAC channel2 mode: DAC channel2 in Normal mode DAC channel2 in Sample and hold mode Note: This register can be modified only when EN2=0. Refer to for the availability of DAC channel2.

0 (B_0x0): DAC channel2 is connected to external pin with Buffer enabled

1 (B_0x1): DAC channel2 is connected to external pin and to on chip peripherals with buffer enabled

2 (B_0x2): DAC channel2 is connected to external pin with buffer disabled

3 (B_0x3): DAC channel2 is connected to on chip peripherals with Buffer disabled

4 (B_0x4): DAC channel2 is connected to external pin with Buffer enabled

5 (B_0x5): DAC channel2 is connected to external pin and to on chip peripherals with Buffer enabled

6 (B_0x6): DAC channel2 is connected to external pin and to on chip peripherals with Buffer disabled

7 (B_0x7): DAC channel2 is connected to on chip peripherals with Buffer disabled

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