TSS=B_0x0
FDCAN timestamp counter configuration register
| TSS | Timestamp select These are protected write (P) bits, write access is possible only when the bit 1 [CCE] and bit 0 [INIT] of CCCR register are set to 1. 0 (B_0x0): Timestamp counter value always 0x0000 1 (B_0x1): Timestamp counter value incremented according to TCP 2 (B_0x2): External timestamp counter from TIM3 value (tim3_cnt[0:15]) 3 (B_0x3): Same as 00. |
| TCP | Timestamp counter prescaler Configures the timestamp and timeout counters time unit in multiples of CAN bit times [1 ⦠16]. The actual interpretation by the hardware of this value is such that one more than the value programmed here is used. In CAN FD mode the internal timestamp counter TCP does not provide a constant time base due to the different CAN bit times between arbitration phase and data phase. Thus CAN FD requires an external counter for timestamp generation (TSS = 10). These are protected write (P) bits, write access is possible only when the bit 1 [CCE] and bit 0 [INIT] of CCCR register are set to 1. |