STMicroelectronics /STM32G0B1 /LPTIM1 /LPTIM_ICR

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Interpret as LPTIM_ICR

Description

Interrupt Clear Register

Fields

CMPMCF	Compare match clear flag Writing 1 to this bit clears the CMP flag in the LPTIM_ISR register
ARRMCF	Autoreload match clear flag Writing 1 to this bit clears the ARRM flag in the LPTIM_ISR register
EXTTRIGCF	External trigger valid edge clear flag Writing 1 to this bit clears the EXTTRIG flag in the LPTIM_ISR register
CMPOKCF	Compare register update OK clear flag Writing 1 to this bit clears the CMPOK flag in the LPTIM_ISR register
ARROKCF	Autoreload register update OK clear flag Writing 1 to this bit clears the ARROK flag in the LPTIM_ISR register
UPCF	Direction change to UP clear flag Writing 1 to this bit clear the UP flag in the LPTIM_ISR register. Note: If the LPTIM does not support encoder mode feature, this bit is reserved. Please refer to .
DOWNCF	Direction change to down clear flag Writing 1 to this bit clear the DOWN flag in the LPTIM_ISR register. Note: If the LPTIM does not support encoder mode feature, this bit is reserved. Please refer to .

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