STMicroelectronics /STM32G0C1 /RCC /AHBENR

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as AHBENR

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (DMA1EN)DMA1EN 0 (DMA2EN)DMA2EN 0 (FLASHEN)FLASHEN 0 (CRCEN)CRCEN 0 (AESEN)AESEN 0 (RNGEN)RNGEN

Description

AHB peripheral clock enable register

Fields

DMA1EN

DMA1 clock enable

DMA2EN

DMA2 clock enable

FLASHEN

Flash memory interface clock enable

CRCEN

CRC clock enable

AESEN

AES hardware accelerator

RNGEN

Random number generator clock enable

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