Regviz

STMicroelectronics /STM32G473xx /PWR /PWR_PUCRG

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as PWR_PUCRG

Share

Cut and paste this URL to share the unmodified register and value:

https://regviz.com/r/STMicroelectronics/STM32G473xx/PWR/PWR_PUCRG#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (PU0)PU0 0 (PU1)PU1 0 (PU2)PU2 0 (PU3)PU3 0 (PU4)PU4 0 (PU5)PU5 0 (PU6)PU6 0 (PU7)PU7 0 (PU8)PU8 0 (PU9)PU9 0 (PU10)PU10

Description

Power Port G pull-up control register

Fields

PU0

Port G pull-up bit y (y=0…10) When set, this bit activates the pull-up on PG[y] when APC bit is set in PWR_CR3 register. The pull-up is not activated if the corresponding PDy bit is also set.
PU1

Port G pull-up bit y (y=0…10) When set, this bit activates the pull-up on PG[y] when APC bit is set in PWR_CR3 register. The pull-up is not activated if the corresponding PDy bit is also set.
PU2

Port G pull-up bit y (y=0…10) When set, this bit activates the pull-up on PG[y] when APC bit is set in PWR_CR3 register. The pull-up is not activated if the corresponding PDy bit is also set.
PU3

Port G pull-up bit y (y=0…10) When set, this bit activates the pull-up on PG[y] when APC bit is set in PWR_CR3 register. The pull-up is not activated if the corresponding PDy bit is also set.
PU4

Port G pull-up bit y (y=0…10) When set, this bit activates the pull-up on PG[y] when APC bit is set in PWR_CR3 register. The pull-up is not activated if the corresponding PDy bit is also set.
PU5

Port G pull-up bit y (y=0…10) When set, this bit activates the pull-up on PG[y] when APC bit is set in PWR_CR3 register. The pull-up is not activated if the corresponding PDy bit is also set.
PU6

Port G pull-up bit y (y=0…10) When set, this bit activates the pull-up on PG[y] when APC bit is set in PWR_CR3 register. The pull-up is not activated if the corresponding PDy bit is also set.
PU7

Port G pull-up bit y (y=0…10) When set, this bit activates the pull-up on PG[y] when APC bit is set in PWR_CR3 register. The pull-up is not activated if the corresponding PDy bit is also set.
PU8

Port G pull-up bit y (y=0…10) When set, this bit activates the pull-up on PG[y] when APC bit is set in PWR_CR3 register. The pull-up is not activated if the corresponding PDy bit is also set.
PU9

Port G pull-up bit y (y=0…10) When set, this bit activates the pull-up on PG[y] when APC bit is set in PWR_CR3 register. The pull-up is not activated if the corresponding PDy bit is also set.
PU10

Port G pull-up bit y (y=0…10) When set, this bit activates the pull-up on PG[y] when APC bit is set in PWR_CR3 register. The pull-up is not activated if the corresponding PDy bit is also set.

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data