QSPISEL=B_0x0, I2C4SEL=B_0x0
Peripherals independent clock configuration register
| I2C4SEL | I2C4 clock source selection These bits are set and cleared by software to select the I2C4 clock source. 0 (B_0x0): PCLK selected as I2C4 clock 1 (B_0x1): System clock (SYSCLK) selected as I2C4 clock 2 (B_0x2): HSI16 clock selected as I2C4 clock 3 (B_0x3): reserved |
| QSPISEL | QUADSPI clock source selection Set and reset by software. 0 (B_0x0): system clock selected as QUADSPI kernel clock 1 (B_0x1): HSI16 clock selected as QUADSPI kernel clock 2 (B_0x2): PLL “Q” clock selected as QUADSPI kernel clock 3 (B_0x3): reserved |