STMicroelectronics /STM32H742x /PWR /CR3

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Interpret as CR3

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (BYPASS)BYPASS 0 (LDOEN)LDOEN 0 (SCUEN)SCUEN 0 (VBE)VBE 0 (VBRS)VBRS 0 (USB33DEN)USB33DEN 0 (USBREGEN)USBREGEN 0 (USB33RDY)USB33RDY

Description

Reset only by POR only, not reset by wakeup from Standby mode and RESET pad. The lower byte of this register is written once after POR and shall be written before changing VOS level or ck_sys clock frequency. No limitation applies to the upper bytes.Programming data corresponding to an invalid combination of SDLEVEL, SDEXTHP, SDEN, LDOEN and BYPASS bits (see Table9) will be ignored: data will not be written, the written-once mechanism will lock the register and any further write access will be ignored. The default supply configuration will be kept and the ACTVOSRDY bit in PWR control status register 1 (PWR_CSR1) will go on indicating invalid voltage levels. The system shall be power cycled before writing a new value.

Fields

BYPASS

Power management unit bypass

LDOEN

Low drop-out regulator enable

SCUEN

SD converter Enable

VBE

VBAT charging enable

VBRS

VBAT charging resistor selection

USB33DEN

VDD33USB voltage level detector enable.

USBREGEN

USB regulator enable.

USB33RDY

USB supply ready.

Links

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