Regviz

STMicroelectronics /STM32H7B3x /SYSCFG /SYSCFG_BRK_LOCKUPR

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as SYSCFG_BRK_LOCKUPR

Share

Cut and paste this URL to share the unmodified register and value:

https://regviz.com/r/STMicroelectronics/STM32H7B3x/SYSCFG/SYSCFG_BRK_LOCKUPR#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (PVDL)PVDL 0 (FLASHL)FLASHL 0 (CM7L)CM7L 0 (DTCML)DTCML 0 (ITCML)ITCML

Description

SYSCFG timer break lockup register

Fields

PVDL

PVD lock enable bit.
FLASHL

Flash double ECC error lock bit
CM7L

Cortex®-M7 LOCKUP (HardFault) output enable bit
DTCML

D1TCM or D0TCM double ECC error signal lock
ITCML

ITCM double ECC error signal lock

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data