DMA channel x configuration register
| EN | Channel enable This bit is set and cleared by software. |
| TCIE | Transfer complete interrupt enable This bit is set and cleared by software. |
| HTIE | Half transfer interrupt enable This bit is set and cleared by software. |
| TEIE | Transfer error interrupt enable This bit is set and cleared by software. |
| DIR | Data transfer direction This bit is set and cleared by software. |
| CIRC | Circular mode This bit is set and cleared by software. |
| PINC | Peripheral increment mode This bit is set and cleared by software. |
| MINC | Memory increment mode This bit is set and cleared by software. |
| PSIZE | Peripheral size These bits are set and cleared by software. |
| MSIZE | Memory size These bits are set and cleared by software. |
| PL | Channel priority level These bits are set and cleared by software. |
| MEM2MEM | Memory to memory mode This bit is set and cleared by software. |
| DBM | double-buffer mode |
| CT | current target memory of DMA transfer in double-buffer mode |